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Altera_Forum
Honored Contributor
16 years agoThank you very much for the response.
Looking at the output of objdump: Program Header: LOAD off 0x00000094 vaddr 0x00200020 paddr 0x00200020 align 2**0 filesz 0x0000b704 memsz 0x0000b704 flags r-x LOAD off 0x0000b798 vaddr 0x0020b724 paddr 0x0020b724 align 2**0 filesz 0x00001a2c memsz 0x00001c40 flags rw- LOAD off 0x0000d1c4 vaddr 0x00420000 paddr 0x00420000 align 2**0 filesz 0x00000020 memsz 0x00000020 flags r-x There are 3 items here, as opposed to the usual 2 when I build a project using only onchip memory with no SSRAM. The last one at 0x00420000 is the address of the onchip, so I'm assuming it's listed because the onchip is still being used as the reset vector in my configuration in SOPC builder. For what it's worth I've tried using the SSRAM configured as both the reset and exception vector, but that still resulted in the same problem shown in the monitor program output screenshot. Looking further at the objdump file, I can see the mem addresses of the assembly output of the program do correspond correctly with the SSRAM. I'm not sure where to go from here? I've attached some other configuration screens if they may be of any use.