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Altera_Forum
Honored Contributor
Honored ContributorVectored Interrupt Controller implementation
Sorry if this is a basic question, but I couldn't find an answer in the literature or forum. I've implemented a VIC in the SOPC Builder, but after generation I now have a d_irq_to_the_cpu_0 in...
Altera_ForumHonored Contributor
Honored ContributorDid you follow the AN? -- http://www.altera.com/literature/an/an595.pdf
In my work, I've never seen that signal exported to the top so you must be doing something...unique. :-) Cheers, - slacker
