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Altera_Forum
Honored Contributor
11 years agoWhy cant you just do the add in the FPGA logic?
Even better, just infer the logic from HDL code. *edit* actually, you can just pass C into the LOADCONST port. http://www.altera.co.uk/literature/hb/arria-v/av_52003.pdf If you really wanted to do in inside the DSP block, you could use the 2nd multiplier input with values C and 1.