Using Nios II with PLL

Will your logic run at 100MHz? Have you constrained your project, told Quartus about the 50MHz clock and derived clocks? Did Quartus report it could meet timing?

Those devices can and will run logic at 100MHz, depending on the complexity of the design. Qsys systems with a Nios processor can result in (relatively) complex logic that simply may not run at 100MHz. If so, I'm afraid it's not going to work.

Ensure you've constrained your design and note whether it meets timing - having run it through Quartus.

Cheers,

Alex