Forum Discussion
Altera_Forum
Honored Contributor
16 years agoErez,
With respect to# 1, the "boot records" are created by elf2flash and reside in EPCS (in your case). The onchip memory which is part of the epcs_controller contains the boot copier code for the Nios II. This is why you point the Reset Address of your CPU (in SOPC Builder) at the epcs_controller component. I hope that explains it. You have to keep in mind that an FPGA is a "blank slate" prior to being programmed/configured. Once you program it with your SOPC Builder design containing a Nios II processor, the processor will attempt to start fetching code from its Reset Address just after the FPGA is programmed. Cheers, - slacker