Using EPCS on power up for uClinux

Hi Erez,

The SOF contains the "bitstream" that configures the FPGA. For systems that boot out of the EPCS, you point your CPU's reset address at the epcs_controller. Now, on boot, here's what happens:

1. The FPGA is configured from the data at the beginning of the EPCS device (by default).

2. Once the design starts running, the CPU loads the boot copier from the onchip memory contained in epcs_controller_boot_rom.

3. The boot copier copies the software from the EPCS device (section-by-section) into volatile RAM.

4. The last boot record tells the boot copier where to begin executing code in RAM.

That's it...

Cheers,

- slacker