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Altera_Forum
Honored Contributor
Honored ContributorUse SDRAM simultaneously with HSP and FPGA
Hi I am using Altera DE1 Soc board. I use HPS and the master on Altera Avalon bus and SDRAM controller as slave which is connected to the SDRAM. I can read and write to the SDRAM without any probl...
Altera_ForumHonored Contributor
Honored ContributorThis one... that SDRAM looks like in sharing mode, maybe you could do a quick test by simulate the write from fgpa and read back from hps for the same memory address for confirmation :D:D
