USB External Chip

Thanks for all your informative answers :).

As an option, can any of these solutions be implemented without a NIOS and interfaced to memory internal to the SOPC builder via VHDL code? I am looking to cut power as much as we can. However I am not certain if such a design will in fact take so much less power?

I assume that if we use a USB controller like the FX2 with the 8051 built in, it will be able to transfer the USB data to my memory internal to the SOPC system with no other internal interfacing required thus reducing the power requirements ?

However there may be additional glue logic needed since there will be another NIOS attached this this internal memory and thus some sort of arbitration will be required. See the thread below

http://www.alteraforum.com/forum/showthread.php?p=155961#post155961 (http://www.alteraforum.com/forum/showthread.php?p=155961#post155961)

So I am not sure at this point which options will give the lowest power options ….?

Also, speed is still an issue as it will be important for future designs where we plan to use\port this design there.

Do you have any further suggestions ?