Altera_ForumHonored Contributor12 years agoUsage of DMA from PIO to SDRAM shared by NIOS Hello everybody, I was wondering if someone could respond to my following question connected with DMA: I have functional NIOS II system with TSE and SDRAM as a main data and instruction me...Show More
Altera_ForumHonored Contributor12 years agoYes, the Avalon fabric will share the SDRAM between the processor and the DMA.
Recent Discussionsnot able to use multiple niosV cores at the same timeMultiple NIOS V ImplementationSolvedImplementing many Nios® V cores on Agilex™ 7SysID TimestampLPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 Pro