Forum Discussion
Altera_Forum
Honored Contributor
14 years agouncontrolled SDRAM content change
Hi, I use a code which checks external SDRAM () by writing 0xAAAA and 0x5555 patterns. But the code always return an error code! When I check step by step SDRAM content with NIOSII IDE I can ...
Altera_Forum
Honored Contributor
14 years agoWith signal tap I can see that SDRAM controller is running. I plugged scope probes and I can see that data, address and control signals voltages change at every SDRAM access.
My code is already based on memtest from Altera. I did some change to let test run until end of SDRAM even a step with error. Here is one test:for (pattern1 = 1, offset = 0; offset < nWords; pattern1++, offset++)
{
IOWR(baseAddress, offset, pattern1);
}
for (pattern1 = 1, offset = 0; offset < nWords; pattern1++, offset++)
{
if (IORD(baseAddress, offset) != pattern1) {
retCode = (baseAddress + offset);
errCounter++;
}
} The errCounter tell me that all steps get an error! I can't believe the entire SDRAM is down!