Altera_Forum
Honored Contributor
20 years agouC/OS-II friendly UART communication
Hi,
I'm trying to set up a few communication links using UART. One is at 115.2kbps and the others are at 9600bps. One is obviously going to be used quite a bit and the others not so much. My problem is setting up the tx and rx routines without taking up all the time during the relatively slow sending (compared to the processor). I want to be able to wait for a packet to come in and to be able to send out while allowing the processor to do other things. Right now I'm testing an interrupt-based solution which looks promising but I'm not entirely sure it's the way to go. I have also tried to poll the RRDY status bit but I kept missing all the data due to buffer overruns (I was pausing the task so uC/OS could do other things while waiting). I could poll successfully only if I didn't allow uC/OS to do anything else. A thought was to have Nios send the data directly into memory (using DMA) as it was received and then have my routine read the memory but I haven't seen any documentation on this. What would be the best way to perform UART transmissions (over multiple lines, not necessarily at the same time though) while still allowing the processor to do time-critical tasks (the UART transmissions are not time-critical but they must be recieved/sent within a reasonable amount of time)? Thanks, Philip