Altera_Forum
Honored Contributor
17 years agoUart/fifo Uart problem
I tried to use a 2nd UART in my project.
ttyS0 I use for the terminal instead of Jtag UART. ttyS1 I need for a communication interface. With the ttyS1 I had some trouble: 1st problem) Reading bytes with opening the ttyS1 device and using read did not return the expected amount of characters. I saw all characters beeing received by the interrupt and transferred to the flip buffer. But reading the flip buffer did not contain all the bytes. I drilled down into the kernel to find where the bytes got lost. Finally I found they got lost because of removing a lock. In the file uClinux-dist/linux-2.6.x/drivers/char/tty_io.c in function flush_to_ldisc I commented out the lock.
//spin_unlock_irqrestore(&tty->buf.lock, flags); //my change
disc->
receive_buf(tty, char_buf, flag_buf, count);
//spin_lock_irqsave(&tty->buf.lock, flags); //my change
I am using kernel 2.6.23 but I saw that this piece of code still exists in 2.6.31 (the function is now in file uClinux-dist/linux-2.6.x/drivers/char/tty_buffer.c) After applying this change to the kernel source read was responding with the right amount of bytes (and the terminal on ttyS0 still worked :-) I have no idea why this change was necessary. Can anybody verify or explain? 2nd problem) Because at 115200 Baud occasionally I got the overflow set I tried out the Fifoed Avalon UART from the forum. http://www.niosforum.com/pages/project_details.php?p_id=89&t_id=18 The component worked and the overflow went away. When I stressed the component however it suddenly happened that I did not receive an interrupt anymore. Investigating the problem with signal tap showed that the interrupt stayed asserted forever. My Nios has a clock of 84MHz and I set the baudrate to 115200. The Fifo settings have been: Tx No Fifo, Rx Fifo 8 words, Timeout 0, Interrupt on every byte. I use the NIOSserial.c driver without modification. Has anybody experienced a similar effect? Stressing the original UART component did not show this problem.