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Patrik78's avatar
Patrik78
Icon for New Contributor rankNew Contributor
3 years ago

UART 16550 IP - Stick parity problem

Hello, in my company we're facing a problem while using UART 16550 IP in stick parity mode: on LSR register we set SP=1, EPS=1, PEN=1 in order to use MARK_PARITY. While in transmission everything...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi,


This is the expected behavior based on document. The SP bit works in conjunction with the EPS and PEN bits. Means SP bit is more passive and it depends on EPS & PEN bits. So at receiving, when even parity is selected (EPS = 1), the PARITY bit (SP) is checked as cleared. When odd parity is selected (EPS = 0), the PARITY bit (SP) should be checked as set.


Thanks,

Best regards,

Sheng


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