Tutorial Video: How to boot uClinux on NIOS II Processor with MMU

There is the header that I generated from DE2_115_SOPC.sopc (from DE2_115_NIOS_HOST_MOUSE_VGA.qar) by "sopc-create-config-files" (from http://www.alterawiki.com/wiki/dasuboot)

# ifndef _M_H_# define _M_H_
/* generated from DE2_115_SOPC.sopc */
/* cpu.data_master is a altera_nios2 */# define CONFIG_SYS_CLK_FREQ 0# define CONFIG_SYS_RESET_ADDR 0xca604000# define CONFIG_SYS_EXCEPTION_ADDR 0xca604020# define CONFIG_SYS_ICACHE_SIZE 4096# define CONFIG_SYS_ICACHELINE_SIZE 32# define CONFIG_SYS_DCACHE_SIZE 4096# define CONFIG_SYS_DCACHELINE_SIZE 32# define IO_REGION_BASE 0xe0000000
/* timer_0.s1 is a altera_avalon_timer */# define CONFIG_SYS_TIMER_BASE 0xea60a400# define CONFIG_SYS_TIMER_IRQ 0# define CONFIG_SYS_TIMER_FREQ 0
/* sdram.s1 is a altera_avalon_new_sdram_controller */# define CONFIG_SYS_SDRAM_BASE 0xc0000000# define CONFIG_SYS_SDRAM_SIZE 0x08000000
/* onchip_mem.s1 is a altera_avalon_onchip_memory2 */# define ONCHIP_MEM_BASE 0xea604000
/* touch_panel_pen_irq_n.s1 is a altera_avalon_pio */# define TOUCH_PANEL_PEN_IRQ_N_BASE 0xe8010000
/* I2S_ctrl.avalon_slave is a Audio */# define I2S_CTRL_BASE 0xe8000600
/* sgdma_tx.csr is a altera_avalon_sgdma */# define CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE 0xe8702400
/* lcd.control_slave is a altera_avalon_lcd_16207 */# define LCD_BASE 0xe80000e0
/* ISP1362.hc is a ISP1362_IF */# define ISP1362_BASE 0xea60a450
/* pio_switch.s1 is a altera_avalon_pio */# define PIO_SWITCH_BASE 0xe80000c0
/* ISP1362.dc is a ISP1362_IF */# define ISP1362_BASE 0xea60a458
/* mmc_spi.spi_control_port is a altera_avalon_spi */# define MMC_SPI_BASE 0xe8000120# define CONFIG_SYS_ALTERA_SPI_LIST { MMC_SPI_BASE }# define CONFIG_ALTERA_SPI# define CONFIG_CMD_SPI# define CONFIG_CMD_MMC# define CONFIG_MMC# define CONFIG_GENERIC_MMC# define CONFIG_CMD_MMC_SPI# define CONFIG_MMC_SPI# define CONFIG_MMC_SPI_BUS 0# define CONFIG_MMC_SPI_CS 0# define CONFIG_MMC_SPI_SPEED 30000000# define CONFIG_MMC_SPI_MODE SPI_MODE_3# define CONFIG_CMD_FAT# define CONFIG_DOS_PARTITION
/* touch_panel_spi.spi_control_port is a altera_avalon_spi */# define TOUCH_PANEL_SPI_BASE 0xe8011000
/* tse_mac.control_port is a triple_speed_ethernet */# define CONFIG_SYS_ALTERA_TSE_MAC_BASE 0xe8702800# define CONFIG_SYS_ALTERA_TSE_RX_FIFO 2048# define CONFIG_SYS_ALTERA_TSE_TX_FIFO 2048# define CONFIG_ALTERA_TSE# define CONFIG_MII# define CONFIG_CMD_MII# define CONFIG_SYS_ALTERA_TSE_PHY_ADDR 18# define CONFIG_SYS_ALTERA_TSE_FLAGS 0
/* pio_red_led.s1 is a altera_avalon_pio */# define PIO_RED_LED_BASE 0xe80000b0
/* sgdma_rx.csr is a altera_avalon_sgdma */# define CONFIG_SYS_ALTERA_TSE_SGDMA_RX_BASE 0xe8702000
/* SEG7.s1 is a SEG7_IF */# define SEG7_BASE 0xe8000080
/* ps2_keyboard.avalon_ps2_slave is a altera_up_avalon_ps2 */# define PS2_KEYBOARD_BASE 0xe8000158
/* sysid.control_slave is a altera_avalon_sysid */# define CONFIG_SYS_SYSID_BASE 0xe8000150
/* timer_stamp.s1 is a altera_avalon_timer */# define CONFIG_SYS_TIMER_BASE 0xea60a420# define CONFIG_SYS_TIMER_IRQ 1# define CONFIG_SYS_TIMER_FREQ 0
/* ps2_mouse.avalon_ps2_slave is a altera_up_avalon_ps2 */# define PS2_MOUSE_BASE 0xe8000160
/* pio_button.s1 is a altera_avalon_pio */# define PIO_BUTTON_BASE 0xe80000d0
/* I2C_0.avalon_slave is a I2C_Master */# define I2C_0_BASE 0xe8000100
/* dma_0.control_port_slave is a altera_avalon_dma */# define DMA_0_BASE 0xe8000000
/* jtag_uart_0.avalon_jtag_slave is a altera_avalon_jtag_uart */# define CONFIG_SYS_JTAG_UART_BASE 0xea60a440
/* uart_0.s1 is a altera_avalon_uart */# define CONFIG_SYS_UART_BASE 0xe8000060# define CONFIG_SYS_UART_FREQ 0# define CONFIG_SYS_UART_BAUD 115200
/* eth_ocm_0.control_port is a eth_ocm */# define CONFIG_SYS_ETHOC_BASE 0xe8020000# define CONFIG_ETHOC
/* SVGA_sgdma.csr is a altera_avalon_sgdma */# define CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE 0xea60a000
/* cfi_flash.s1 is a altera_avalon_cfi_flash */# define CONFIG_SYS_FLASH_BASE 0xe9000000# define CONFIG_FLASH_CFI_DRIVER# define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */# define CONFIG_SYS_FLASH_CFI# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE# define CONFIG_SYS_FLASH_PROTECTION# define CONFIG_SYS_MAX_FLASH_BANKS 1# define CONFIG_SYS_MAX_FLASH_SECT 1024
/* pio_green_led.s1 is a altera_avalon_pio */# define PIO_GREEN_LED_BASE 0xe80000a0
/* onchip_memory2_0.s1 is a altera_avalon_onchip_memory2 */# define ONCHIP_MEMORY2_0_BASE 0xea608000
/* altpll_0.pll_slave is a altpll */# define ALTPLL_0_BASE 0xe8000040
# endif /* _M_H_ */

And there are different addresses. For example:

--- Quote Start ---

pio_red_led: BASE = 0x0800_00b0, END = 0x0800_00bf

--- Quote End ---

but from this file:

/* pio_red_led.s1 is a altera_avalon_pio */# define PIO_RED_LED_BASE 0xe80000b0

which adresses are correct? because i tried to use your adresses but it doesn`t work.

there is code that i tried to use to turn on leds (based on the code that I found here http://lists.rocketboards.org/pipermail/nios2-dev/2012-september/006448.html ):

# include <stdio.h>
# include <stdlib.h>
# include <unistd.h>
# include <sys/mman.h>
# include <sys/types.h>
# include <sys/stat.h>
# include <fcntl.h>
 
# include <errno.h>
# define GPO_BASE     0x080000b0    //Absolute Base address
# define GPO_LEN      16    //Span of register to access
 int main(void)
 {
     int memfd;
     size_t map_len;
     void *ts_my;
     void *mapped;
     unsigned int pgoff;
     int value=0;
     memfd = open("/dev/mem", O_RDWR | O_SYNC );
        if (memfd < 0)
     {
         printf("Cannot open /dev/mem\n");
                exit(1);
     }
         pgoff = (unsigned int) (GPO_BASE & (sysconf(_SC_PAGE_SIZE)-1));
         map_len = GPO_LEN + pgoff;
         mapped = mmap(NULL, map_len , (PROT_READ | PROT_WRITE),MAP_SHARED, memfd, GPO_BASE - pgoff);
          if (mapped == MAP_FAILED )
          {
                printf("Cannot map registers\n");
        printf("Can't mmap %i = %s\n", errno, strerror(errno));
          }
         close(memfd);
     ts_my = mapped + pgoff;
//attempt to write to data register to switch on leds
     *(unsigned*)(ts_my+0x0) = 0xffff; 
     
     
     //value= *(unsigned*)(ts_my); //to read
     //printf("%d\n",value);
     printf("mapped:%x pgoff:%x ts_my=%p\n",(unsigned int)mapped,(unsigned int)pgoff, ts_my);
     printf("memorymapped register add:%x\n",(unsigned long *) ts_my);
     printf("memorymapped register value:%u\n",*(unsigned long *) ts_my);
     munmap(mapped, map_len);
     return EXIT_SUCCESS;
 }