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MatC's avatar
MatC
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1 year ago

TSE on Arria10 and marvell88e1512

Hi , I'm developing a custom board using the Arria10AX057H4F34E3SG. In the FPGA I have instantiated a NIOS II processor with a TSE peripheral. The TSE is connected in SGMI mode to an external PHY M...
Nios Architecture
  • MatC's avatar
    MatC
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    1 year ago

    Thanks for the replay.

    I'm using quartus 22.4 and the suggested example is no longer supported.
    To test the example on my board I had to use Quartus 18.0 and it works fine.
    At this point I have also tested my firmware with Quartus 18.0 and it works fine. One of the biggest differences I noticed is the packet length, for example the TSE in Quartus 22.4 does not pad the packet correctly, in fact the shortest packet I can see in Wireshark is 56 bytes long, the same packet sent with TSE 18.0 is 60 bytes long, in general to get the right packet length I have to add +4 to the packet length. At this point I have a question: Is there a different configuration I need to consider when configuring the newer TSE version?

    Thanks in advance