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Altera_Forum
Honored Contributor
14 years agoFrom Altera's driver there are two interesting functions for your case
/* @Function Description: Perform switching of the TSE MAC into GMII (Gigabit) mode.
* COMMAND_CONFIG register is restored after reset.
* @API Type: Public
* @param pmac Pointer to the TSE MAC Control Interface Base address
*/
alt_32 tse_mac_setGMIImode(np_tse_mac *pmac)
{
alt_32 helpvar;
helpvar = IORD_ALTERA_TSEMAC_CMD_CONFIG(pmac);
helpvar |= ALTERA_TSEMAC_CMD_ETH_SPEED_MSK;
IOWR_ALTERA_TSEMAC_CMD_CONFIG(pmac,helpvar);
return SUCCESS;
}/* @Function Description: Change operating mode of Marvell PHY to RGMII
* @API Type: Internal
* @param pmac Pointer to the first TSE MAC Control Interface Base address within MAC group
*/
alt_32 marvell_cfg_rgmii(np_tse_mac *pmac) {
alt_u16 dat = IORD(&pmac->mdio1.reg1b, 0);
dat &= 0xfff0;
tse_dprintf(5, "MARVELL : Mode changed to RGMII/Modified MII to Copper mode\n");
IOWR(&pmac->mdio1.reg1b, 0, dat | 0xb);
tse_dprintf(5, "MARVELL : Enable RGMII Timing Control\n");
dat = IORD(&pmac->mdio1.reg14, 0);
dat &= ~0x82;
dat |= 0x82;
IOWR(&pmac->mdio1.reg14, 0, dat);
tse_dprintf(5, "MARVELL : PHY reset\n");
dat = IORD(&pmac->mdio1.CONTROL, 0);
IOWR(&pmac->mdio1.CONTROL, 0, dat | PCS_CTL_sw_reset);
return 1;
}(change mdio1 to mdio0 if you are using the first mdio register bank)