Trisaet Avalon and IRQ from internal Avalon

Hi All,

Im new to this, picking up some mostly completed Nios II work. Ive tried the search, but it seems noone has seen this...

I have 2 peripherals on the tristate external Avalon bus, the CFI and our own LCD. individually these seem to work ok. I have about 10 things on the internal Avalon bus, like I2C controllers, and other stuff. The important one seems to be the 1mS tick, which generates an interrupt every mS, which we use for timers and such like. The system runs our own task switching. With 2 tasks, one accessing the Flash, and one writing to the LCD the system appears ok, and the mesages on the LCD are correct. If I add in the task which registers the 1mS tick handler then the world breaks, and the LCD gets screwed up. If I disable interrupts at the point when I access the external Tristate bus then the world is once again ok. It seems to me that the internal interrupt (1mS) is causing a corruption / abandonment of the external tristate bus transaction.

Has anyone else seen this? Am I missing something obvious?

cheers

Dave