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In this case I understand I simply need to modify the OS_ENTER/EXIT_CRITICAL macros, isn't it?
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Yes, but remember that 'exclusive access' then becomes your responsibility.
Haven't worked a lot with NIOS interrupts yet (soon), but I know that each separate device has an interrupt mask bit in a register, and I would be fairly certain that the interrupt controller has a mask register too. The interrupt controller would be the obvious place to do it, if available, but a longer version could be done with each device.
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Infact I considered this option, but it would imply the processor must stall for a while waiting for the required time. This would be not very efficient.
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Yes, but assuming an even distribution, you would only be stalling for average=1/2 jitter; max=jitter. I think you said 40 uS jitter on a 1 mS interrupt. That seems to work out to an average of 2%, better if your jitter is skewed toward the low side (reasonably likely). If it's important enough for your time, it should be important enough for the processors.
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