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GHelb's avatar
GHelb
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6 years ago

There is a problem using the JTAG UART in 19.1

The instantiation is wh_nios.jtag_uart: Info: wh_nios.jtag_uart: JTAG UART IP input clock need (sic) ... The HDL builder looks for wh_nios_jtag_uart and it can't find it: Error: jtag_uart: Failed ...
GHelb's avatar
GHelb
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6 years ago

The error happens inside Platform Designer. It is unable to create the system.

I checked: A design that works in 18.1.1 does not work in 19.1.