Forum Discussion
Altera_Forum
Honored Contributor
21 years agoHello LiangYi,
Altera Nios II Development Board: The CPLD (EPM7128) is used reset handling and for configuring the FPGA. The configuration data is stored in the upper space of the flash and will be read out from the CPLD during start up. The application code for the Nios II is stored in the lower space of the flash (address 0x0). Microtronix Cyclone Development Board: The configuration data for the FPGA is stored in the serial EEPROM (EPCS4). The FPGA will be configured automatically during start up. The flash is only used for storing the application code for the Nios II. (I don’t know details about the DK from Microtronix, all I know is the information from the data sheet). If you have more problems with your Microtronix DK I think you should contact Microtronix directly. I hope the information will help you a little bit. Bye, niosIIuser