Forum Discussion
Altera_Forum
Honored Contributor
13 years agoThank you very much.
In my system, I have only one output was connected to GPIO for get the signal (the execution time - signal = 1 the function are processing, signal =0 the function aren't processing). From that information I found the execution time of my process. the procedure of my system below: Firstly, Nios II sends zero to FPGA ~~~~> Secondly, Nios II processes the function (which I need to know the execution time) ~~~~> Thirdly, Nios II sends one to FPGA. The signal (0 and 1) was sent from Nios to FPGA, I can measure from the GPIO of FPGA board. --- Quote Start --- The execution times are reasonably fixed (and determinable) provided that: 1) there is no contention for Avalon slaves --- Quote End --- Can you tell me more information about this? --- Quote Start --- 2) there are no delays waiting for anything external (eg JTAD UART) --- Quote End --- In FPGA board I have only one SOPC and one pin connect to 1 GPIO --- Quote Start --- 3) the cache transfers are the same --- Quote End --- What is the cache transfers. Where can I check it? --- Quote Start --- 4) the branch predictor behaves the same way. --- Quote End --- What is the branch predictor behaves? --- Quote Start --- To get trully determinable execution times you need to use tightly coupled memory for code and (most) data, and to disable the dynamic branch prediction. --- Quote End --- I didn't have any code In FPGA board accept SOPC and one output.