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Altera_Forum's avatar
Altera_Forum
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14 years ago

SYSTEM_INFO to vhdl parameter

Hi, I would like to automatically pass the clock frequency to the generated component. For this I added a line in the _hw.tcl file to use the SYSTEM_INFO property. Unfortunately, the com...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

found my mistake : the argument to SYSTEM_INFO CLOCK_RATE must be the interface name (mostly clock_reset), not the clock signal's name.

FILE _hw.tcl

...

add_parameter SYSFREQ NATURAL 1

set_parameter_property SYSFREQ SYSTEM_INFO {CLOCK_RATE clock_reset}

set_parameter_property SYSFREQ AFFECTS_GENERATION false

set_parameter_property SYSFREQ HDL_PARAMETER true

set_parameter_property SYSFREQ VISIBLE false

...