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Altera_Forum's avatar
Altera_Forum
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14 years ago

System ID problem

Hi,

I build a SOPC system which consists of a Nios II cpu (on cyclone 3), SPI, onchip memory and jtag uart component with frequency of 110 MHZ. If I download the elf. file to the fpga, I get a sysid error.

I solved this problem with a sysid-com. and pipeline bridge between the cpu and jtag, but it doesn't works.

Anyone has any idea of why this is happening? Please help

Thanks.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I had this happen to me when I was overrunning the on-chip memory space. Fixed it by increasing the size of my memory, or removing the printfs as to not compile the jtag uart/debug. The jtag uart/debug modules take quite a bit of memory.