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Altera_Forum
Honored Contributor
14 years agoSystem Console & master_write_32 — can't do this while target is running?
I had a simple controller written in Verilog that was configuring Altera's TSE MAC. Up to this point, it was fairly simple. However, what I wanted to do next is to set a lot of Marvel PHY's settings ...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- ... Any help solving the problem is appreciated.... Thank you! --- Quote End --- I guess you'll have to halt the processor in some way, but I don't know how to do that either. A simple way that fits you needs of configuring the MAC + PHY is to add a "JTAG to Avalon Master Bridge" component. It will also show up in the system console like the processor and you can start writing to/reading from your system without halting anything. Please find below a complete walkthrough:
set path 0]Be sure you'll catch the JTAG Bridge and not the NIOS. Maybe you'll have to insert a 1 instead of a 0. If you want to be sure, remove the NIOS completely :D. open_service master $pathThis will link the System Console to your master. You could perform is_service_open master $pathto see wether it worked (=1) or not (=0). Now you're ready to go with master_write_32 $path 0x12345678 0xdeadbeefand master_read_32 $path 0x12345678 1Hope that helped :)