Altera_Forum
Honored Contributor
16 years agoStuck in Interrupt Handler
Hi all.
I am fairly new to NIOS II development, although I have been working with Altera FPGA's for some time. I need to implement serial ports and have been fighting with the NIOS II UART IP for several days. I have finally determined that the Altera provided UART does not seem to have a proper interrupt handler or is not smart enough to keep from overwriting the TX buffer on the UART. The behavior is that any data sent from the NIOS II to the UART only arrives back in Hyperterminal if I put a usleep() call after writing each byte. If I don't, bytes get corrupted. So, I decided to switch to the FIFO'ed Avalon UART from this site. When I run my NIOS II code in the debugger, it never even hits the first breakpoint in my mian() routine. If I then pause execution, the processor is always looping either in the FIFOed UART's interrupt handler (fifoed_avalon_uart.c), or in the system source that checks for any active interrupts (alt_irq_handler.c). I am not using an OS - just straight up NIOS C/C++ code. Is this the problem? I've done a lot of embedded code over the years, and you should not need an OS to implement an IRQ handler, unless I don't understand something fundamental about how the NIOS works. Any advice is appreciated. I am running Quatus 9.0 sp1. Thanks! Jim