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Altera_Forum's avatar
Altera_Forum
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15 years ago

Strange Ethernet behaviour

We currently have a a design which is based heavily upon the Cyclone 3 FPGA dev kit. However, at this point it is very difficult to return to the Dev Kit to test the software some am hoping someone h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

This could be similar to the problem I found and described in the previous post.

System behaviour changed completely when I added or removed delays.

For example the connection worked fine if a hub or switch was inserted between server and client, failed if I connected directly. Same if I artificially delayed tx or rx frames.

As I told you, this was related to the concurrence of tx and rx data in sgdma.