Altera_Forum
Honored Contributor
15 years agoSSRAM verify error
Good afternoon,
I have a problem with a property own board. I use the same SSRAM and conection than NIOS II cyclone II board, then it must be going, but the problem is that when I try to download to the SSRAM, NIOS IDE gets an error: "Verifying 00200000 ( 0%) Verify failed between address 0x200000 and 0x201DAB Leaving target processor paused". I have checked the SSRAM with IORD and IOWR functions, and it works correct. Now I'm triying to check the SSRAM after the NIOS IDE download the program: - I put the SSRAM as Program Memory, roData,... - I save the .elf generated. - Run debuger (it writes all the .elf data to the SSRAM and verify it, with the error). -Change the program memory, roData... to OnChipMemory. - Run debuger, and then, before anything, I open a memory window and check the content of the SSRAM with the data of the .elf generated in the first step. The problem is that the elf file has a header, and I suppose that something more in the middle. I have check part of the .elf with SSRAM content and all is correct, but I don't know if there is something that must be in the SSRAM that isn't. Some one know the construction of the .elf file? Thank you for your support, Isaac Campos