Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- How are you connecting the PHY and the TSE? Did you put timing constraints on the I/O and does the design meet timing requirements? --- Quote End --- I connect the PHY and the TSE with .v files(top-level file?). I didn't put timing constraints on the I/O. Will it affect my project? What should I do?