Share variables between verilog file and niosII application file(.c file)

Sorry. I didn't notice you want to store your data into sdram. I wrongly assumed onchip ram was your target! :-(

Then you need a different architecture:

Nios connects directly to the sdram in the standard way and you need another Avalon master on the same bus, in order to write data coming from custom hdl.

Usually this task is accomplished by dma which will take care to transfer data from your source.

An alternate method is exposing bus signals out of sopc system and access memory directly from your hdl side. But in this case you must be careful to correctly arbitrate the bus in order to avoid contention and stalling Nios accesses.