Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorShare variables between verilog file and niosII application file(.c file)
Hello, I am trying to do a small concept where in I have created a project on DE2-115 board. In the same project, I have also implemented niosII processor and written a simple program to toggle th...
Altera_ForumHonored Contributor
Honored ContributorIn HDL (i.e Verilog) you must create the variable as a register in a Memory Mapped slave.
In Nios c code you define a pointer to the base address of the MM slave so you can access it as a regular variable. Remember to add 0x80000000 to the pointer address for uncached access: this prevents Nios to get the variable from cache rather than actual data possibly modified from HDL side.
