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Altera_Forum's avatar
Altera_Forum
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19 years ago

Share mem, Multiprocessor communication, 1WR, N RD

I would like to implement a multiprocessor NIOS II system with some shared tables in SRAM. Only one processor will write to the table, and multiple other processors will read the table at a later time. Reads and Writes are guaranteed not to conflict.

For a single processor A, I am able to move .RODATA, .RWDATA, and .HEAP to SDRAM or SSRAM in IDE project properties.

How can I get the other processors to be able to see the table produced by processor A?

Any help and/or pointers will be greatly appreciated!

Jike

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    From a hardware standpoint, you just need to make sure that the data master of each of the processors is connected to the memory in SOPC Builder. The memory will then be accessible to each of the processors using the same address.

    From a software standpoint, you'll need to make sure that each processor knows the offset from the beginning of the memory to the location of the shared data table.