Setting up TrustZone on Cyclone V FPGA board
I'm currently working on a project using the Cyclone V SoC FPGA. I'm looking to make use of the ARM TrustZone Security Extensions to prevent non-secure accesses to a certain area of the SDRAM. Through reading the Cyclone V HPS Technical Reference Manual I was able to partition the SDRAM into secure and non-secure areas, through the SDRAM controller. However, I'm still unsure how to set up an environment where I can switch between the secure and normal worlds. I've found some examples which seem to set up TrustZone on other development boards
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka15417.html
but I'm unsure how to port them to the Cyclone V. I was wondering if anybody knew or had some documentation on how to set up TrustZone on the Cyclone V board where I could switch between code running in the secure and non-secure worlds?
Thanks Andrew