FawazJ_Altera
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Re: Correct way to use mSGDMA with a NIOSV/m processor on a MAX10 FPGA
Hello Dr. Barry, It’s recommended to use the same Quartus Prime version that was originally used for the design. This helps avoid project migration issues that could alter IP behavior and potentially introduce untested or unexpected results. I was able to extract the file and have compressed it, it’s attached here. Please let me know if you’re able to download it successfully. Thank you, Fawaz14Views1like1CommentRe: NIOS does not start after SW download (timing issue?)
Hello Steve, Have you tried debugging the application using the Nios II Eclipse Debugger? Setting breakpoints after the function can help determine where the application is getting stuck. You can also use SignalTap to observe internal signals, and the Nios II plug‑in to capture the processor’s address and data activity. The external Avalon‑MM signals should be sufficient for this level of debugging. However, before relying on hardware traces, I recommend stepping through the application in the Nios II debugger to identify which specific function call is causing the issue. Thank you, Fawaz.37Views0likes0CommentsRe: NIOS does not start after SW download (timing issue?)
Hello, The General Settings section is located at the top level of the BSP settings when the BSP Editor is opened. A snapshot is attached for reference. The stdin, stdout, and stderr are currently set to none, but they should be assigned to the JTAG UART instance in your system. Setting these IO streams to "none" would isolate your FW/SW from the console. From the linker settings, it appears that the system is using on‑chip memory rather than DDR3. In addition, the DDR3 region does not appear in the linker view. If a DDR controller is included in your Qsys design, this may indicate that it is not connected to the Avalon‑MM bus. Given the current on‑chip RAM configuration, it is recommended to create a simple Hello World application and run it to verify basic system functionality and help isolate any unexpected design issues. Thank you, Fawaz54Views0likes4CommentsRe: NIOS does not start after SW download (timing issue?)
Hello, I have few comments here, and would appreciate your feedback: The timing issue has been resolved, so I would expect the DDR3 to operate normally. The Nios II ELF was successfully downloaded from the command line, which effectively eliminates any DDR3 calibration failures. If calibration had failed, the download would not have succeeded due to an unresponsive DDR3 controller. I am not sure which script did you use to download the ELF. I recommend including the -r option (if not used) while downloading the elf to issue a reset. I also suggest running the following command after the ELF download completes and before opening the UART terminal (or even while its open, and use another command line to run the command): nios2-download --reset-target I still need to review the linker script settings, so kindly share the screenshot with me. if possible, share the settings.bsp file. I also need to know which JTAG UART driver is being used—whether it is the standard driver or the fast driver. This can be checked in the BSP Editor under the General settings. Additionally, there is a warning in the BSP Editor indicating that .stdin, .stdout, and .stderr are not assigned to an output device. Although a JTAG UART instance appears to be present in the design, the standard I/O streams are currently set to “none.” I would recommend to update the BSP settings to redirect these streams to the JTAG UART. Finally, I would like to know if you tried running the hello world example before moving to the real SW or FW. Also, did you try running it from on-chip RAM instead of DDR3? Thank you55Views0likes2CommentsRe: Agilex 5 with HPS Cryptographic services and bootflow
Hello, Kindly see my replies provided below for your reference: Engineering sample, it's code is MK-A5E065BB32AES1, when you look at the doc I attached (here is the link https://cdrdv2-public.intel.com/820978/ug-820977-820978.pdf) in the Table 1 you see that for the following engineering sample MK-A5E065BB32AES1, the device part number is A5ED065BB32AE6SR0. Decoding the 4tf digit of the ordering number and looking at the part number decoder we have A5ED, with D implying Quad HPS and Cryptographic Services. Where can I find the information that Cryptographic Services are disabled on ES? >> All the engineering sample devices are non-security enabled. The Agilex5 device security user guide used this R0 for demo only. This will be updated with a production OPN. As for the A5EC065BB32AE6S, looking at the 4th digit and part number decoder it seems that this variant does not feature Cryptographic Services am I right? >> Yes, you are right. As for the Terasic board (https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=123&No=1384&PartNo=2#contents) with FPGA: A5EB013BB23BE4SCS and again looking at the 4th digit and product table code it seems that this product should have HPS as well as Cryptographic services, yes? >> Yes, you are right. For production devices, the available security features depend on the specific device variant. In general, bitstream authentication and encryption are supported. If CryptoServices are not available, it indicates that the corresponding cryptographic primitives are not supported on that particular device. For full security functionality, you should select a device variant that includes CryptoServices. Regarding HPS secure boot, all production devices support authentication of the complete HPS software stack. This includes the FSBL (as part of bitstream authentication), followed by the SSBL (U‑Boot), the Linux kernel image, and the Device Tree (DTB file).15Views0likes0CommentsRe: Nios V: niosv-download reports "no harts found" on Agilex 5 board
Hello, We have tested the Github ready-to-test files, and they are working on boards. I would like to know if you are using a development kit or customer kit. Also, what is your device OPN. Furthermore, can you program the .sof file, then use Nios V command shell and type the following command: jtagconfig -n Send me the output of this command. Thank you, Fawaz674Views0likes0CommentsRe: I compiled using the nios2 command shell. How do I debug it using the nios2 EDS tool?
Hello Michael, The "wsl make all" is expected since you run Nios II environment on Windows using wsl. Unfortunately, I couldn't replicate this issue on my computer under Windows environment due to some technical difficulties, I will try t find an alternative for this. The only replication I did was based on Linux environment. The setup is different between the two environments. I would suggest either: 1- Use one environment for building the project. Lets say, build using Nios II command shell, and debug using Nios II IDE. 2- If you want to build and debug using the IDE environment, try to start creating the project from the IDE itself instead of the command shell. Side note: when you import the app and bsp directories into your IDE environment, try to check the option that clears the builds. This will import the projects as "cleared", so you can build it inside the Nios II IDE. I will let you know if I can replicate on a Windows system. Thank you, Fawaz.1.1KViews0likes1Comment