Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributorsdram write/read in arria ii gx dev. board
Hi I am trying to write and read the DDR3 SDRAM on my Arria II Gx Dev. board with the following code.
# include <stdio.h>
# include "system.h"
# include "altera_avalon_pio_regs.h"
# inc...
Altera_ForumHonored Contributor
Honored ContributorI check some documents about SDRAM design again and run a tcl file which is about board trace model. The tcl file named "ArriaIIGX_DDR3_BTModels.tcl" can be found in some reference designs from Altera.
Now, I get half chance to read those 32 data from SDRAM successfully. In failed cases, most the data read from SDRAM are correct. I'm wondering if the timing issue is the root cause of my problem, because I guess the board trace model helps my design to have a better performance in timing. Thanks.
