Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Sdram access in HDL and Nios II

Hi I'm fairly new to FPGA programming. I would like to use the onboard sdram memory of my DE2-70 board to pass data between c++ software, running on a Nios II cpu and a verilog component. W...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You create a component that has the on-chip memory inside it (not the on-chip component that appears in SOPC Builder). If you want a verilog example shoot me PM with your email address and I can send you something I'm working on that does this.