Honored Contributor
Honored ContributorDoes it still crash if you take the ga++ out, i.e. only NOPs?
I had a 'thing' about 2 years ago. NIOS1 design. All went well by checking memory with GERMS. BUT as soon as I ran code from it the software crashed. First of all the PCB was crappy. Had to design the entire thing on double sided PCB which caused my tracks to be too long (budget constraint :-( Then I tried to lower the CPU speed but the same thing occured. Hmmm. Eventually I tracked it down. No matter what the speed was the problem originated from the rise times. It seemed that when I had repeated hits on the datalines the data would get corrupted. I could fix the errors by soldering 1pF caps between data and ground but eventually decided to redo the boards using multilayered PCBs- problem solved. It looks like the code should run. It does not jump (relocation error possibility) and when it hits RET the stack should have the right return address. Options: 1) Check with an empty function, e.g. 1 NOP and RET. This should work, surely! 2) Lower the clock speed 3) I don't know what track lengths you have, going to the SDRAM, but try to increase the delay from the PLL (You are using a PLL ?) 4) Write some SRAM code to hammer the SDRAM with a pseudo random stream of data and verify it back. Don't use the same value. The more chaotic the better. If there are errors then the interface doesn't work. VMS
