Honored Contributor
Honored ContributorHi,
I am trying following the philosopher tutorial and creating my own project. I am facing following difficulties: 1. I made two subsystem same as given in philosopher tutorial (includes NIOS, JTAG, 3 Avalon Bridge, Mutex). When i include this subsystem in my top system(includes 2 Subsystem as describe earlier, Onchip Memory, Jtag Uart, NIOS), I get an error saying "the onchip memory is out of memory space defined for NIOS master port". And I can see that, the address assigned to on chip memory is unreachable by the no of bits assigned to the address bus of NIOS Master Port. As i increase the bit size of address bus of NIOS master port, the on chip memory address also increases and again goes unreachchable. What should i do for this case?? 2. I want to know the difference betwn Avalon MM Data Master Port and Avalon MM Instruction Master Port. Which out of these should be connected to Onchip Memory, JTAG UART, custom block, performance counter and WHY ??? Suggestions and help is highly appreciated. Thanks
