Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHi Kazu,
Thank you very much for your time to help out this issue. There is link pulse when the uClinux boot up and the PC indicate connectivity running at 1Gbit. The scope measurement of the enet_gtx_clk signal to the Marvell 88E1111 clock is active and running at 125MHz as expected. In uClinux, I was able to verify the Ethernet activity by executing "ethtool -S eth0". Interestingly, when ping from PC to the development board, uclinux received same amount of data frame was ping by the PC. Does it means the hardware is working but Kernel may not configure correctly? I did follow the direction closely from http://www.alterawiki.com/wiki/ethernet to setup the Kernel, but do not know if there are a few other steps maybe missing for connection between PC and the FPGA. Any advice is greatly appreciated. Thanks, Yeung