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The data cache will mask those problems because it will always do 32-bit accesses. Without the cache (or if you do an access by bypassing the cache) all 8-bit writes will fail. I guess that 8-bit accesses can happen in I/O functions, but also possibly in all string-manipulating functions, so it could be a problem.
According to this message by dsl (
http://www.alteraforum.com/forum/showpost.php?p=123683&postcount=4), you will also run into problems with 16-bit accesses if you don't connect the byte enable lines, so you should keep the data cache for now, and avoid any cache bypassing.
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I noticed when setting up the Nios II data cache in Qsys that we have a choice of "Data cache line size". I first tried setting it up as 16-bit and it worked. Then I changed it to 32-bit to see what would happen, and it still worked. Would it be best if I set it for 16-bit and enable burst transfers?
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