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Altera_Forum's avatar
Altera_Forum
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13 years ago

Relationship among Niosii, Avalon MM interface, DMA etc..

Hi, Please help me to clarify the relationship among these terms... 1. Suppose I want to move a batch of data from SDRAM to the registers or BRAMs on a custom module using Avalon MM fabric...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi Ted,

I have created the Qsys design with Nios II processor connected to TXS port of PCIe hard ip to access the x86(host) processor DDR3 memory.

I want to know after the driver allocate a memory in the host processor, how x86(host) processor writes the address of the memory to the address translation table?

Please let me know if you required some more information.

Thanks in advance.