Reissue instruction after interrupt

Hi folks!

I'm developing a new kind of MMU with the help of the SOPC-Builder and the Altera HAL.

My MMU is a Avalon Bus Component for now. This is no problem, since it is a proof-of-concept design at this state.

The coarse overview of the components looks like this: there is a NIOS II-Core which can access some memories in the system and of course a data slave at the MMU. The MMU itself can access different memories. At first the memory where the page tables are located and then the memory which should be handled and managed. The page tables can be modified from the NIOS II. The managed memory can be seen for debug purposes from the view of the NIOS II. But this is not relevant for the operation since the MMU works transparently to data accesses.

For an access there has to be an entry in the page table. If there is none, an interrupt is signaled from the MMU and an ISR has to handle this condition. It maps a new page, make the appropriate entries in the page table and releases the system back to normal operation again.

The really important thing is, that after this interrupt-condition an access to the managed memory has to be reissued or it will be lost. And losing data is never an option.

I read through the docs of Altera and the handling of interrupts. Meaning of the ea-register an so on. But for now, I'm not able to manipulate the back jump address in the way to reissue the last instruction before the interrupt happened.

Can you help? It would be great!

Thanks in advance!

Kind Regards,

Martin