Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Regarding Exception Vector

Hi, this is sundaram from University of Waterloo. I don't understand what exception vector is completely. My understanding goes something like this. Exception Vector is the place where the executable...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

That would be difficult since you would have to restore the state of CPU1 in CPU2 (registers, stacks, etc...) This is kinda what operating systems do in SMP mode. There might be an easier way to do something similar to achieve whatever your end goal is. For example if you wrote your code to store off states and restore them and you only transferred the code from one processor to another at places in the code that do the state storing/restoring that would be probably much easier to implement.