Rebuilding library after changing hardware design

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originally posted by snadden@May 5 2006, 03:27 PM

i am using the standard fpga design from the nios ii kit and i have a working project with ecos. i want to add another pio port to my design. after adding the new pio port in sopc builder and rebuilding the fpga design in quartus, how do i rebuild ecos to give me access to the new pio port? i tried using the nios2config tool to clean and then rebuild my project, but this did not generate a new copy of install/cyg/hal/system.h in the folders under my ecos project.

i then made a new ecos configuration file in a new folder. when i built that library the system.h file which was generated contained references to the new pio port i had added. i don't want to have to start a new ecos project every time i tweak my hardware, is there a method to make nios2config regenerate the system.h file after changing the hardware design?

mike

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Just delete your folders like this foo_build, foo_install, foo_mlt

and then you should regenerate Bulid Tree

But I think you should try "Generate Bulid Tree" only.

Try it!