Forum Discussion
Hi,
To answer your question
1. NIOS II Boot Sequence and Programming for the First Time
Is there a boot ROM inside Cyclone 10?
No — unlike microcontrollers (MCUs), FPGAs like Cyclone 10 LP do not contain built-in ROM or bootloader. Everything, including your NIOS II CPU and its program, is part of the FPGA bitstream.
Boot Sequence Concept in NIOS:
The boot sequence in FPGA (with NIOS) is:
[FPGA configuration from Flash (e.g., EPCQ)] → [FPGA loads bitstream including NIOS + memory + bootloader] → [Bootloader runs from on-chip memory or external RAM] → [Loads firmware from Flash to RAM, starts application]
How to program it the first time?
Use Quartus Programmer + JTAG Cable.
You design a bitstream that includes NIOS + small memory + bootloader.
Program the FPGA or configuration flash (like EPCQ).
After configuration, the FPGA will include NIOS running your bootloader or program.
Prebuilt UART Bootloader Tool?
You might be referring to SBT (NIOS II Software Build Tools) provided by Intel. One example is:
nios2-flash-programmer: used to program flash devices via NIOS.
If you want to boot over UART, you can create a simple UART bootloader using HAL.
2. Cyclone 10 LP On-Chip RAM Size
Cyclone 10 LP does not have fixed "RAM" like a microcontroller. You add on-chip memory blocks manually in Platform Designer. However, the available amount depends on the number of M9K blocks in your FPGA.
For 10CL120, the total available memory is 4320 Kbits, i.e., 540 KB of internal RAM (M9Ks).
You can distribute this to your design however you want — for instruction memory, data memory, buffers, etc.
3. ROM Size in NIOS II
There’s no physical “ROM” — what you're calling ROM is on-chip memory initialized with code (like reset vector).
The maximum ROM size = total available on-chip RAM (M9K blocks).
In Quartus, use "Fitter Resource Usage Summary" after compilation to see how much is used and how much is left.
Platform Designer shows estimated M9K usage per memory block.
4. If I Use ROM, Do I Need a Bootloader?
If you’re using on-chip initialized memory as ROM, it contains the firmware directly.
No bootloader is needed if the firmware fits and is placed directly in this ROM.
However, if your firmware is large and stored in Flash (e.g., EPCQ), then a bootloader is needed to load the firmware from Flash to RAM at runtime.
5. PLL Handling in Quartus
Yes, Quartus will add a PLL if needed, but it’s best to insert and configure your own PLL if you want control over clock frequency.
If you add your own PLL and connect clocks properly, Quartus will not insert another.
No need to delete Quartus-inserted PLLs — just manage it from Platform Designer or Quartus IP Catalog.
6. JTAG Pins for Programming
To connect an external JTAG programmer (like USB Blaster), you need to export these pins:
| JTAG Signal | Cyclone Pin Name | Direction |
| TDI | TDI | In |
| TDO | TDO | Out |
| TCK | TCK | In |
| TMS | TMS | In |
| nTRST (optional) | In |
These must be routed to a JTAG header on your board.
You can refer to Intel JTAG header layout (10-pin or 6-pin).