Honored Contributor
Honored ContributorHi John,
--- Quote Start --- I started out with a plan of turning compression off the FPGA load, thus fixing the location of the software load. That said I was unable to get a consistent load size from compile to compile. The few loads I checked always appeared to deviate a few bytes. It is possible I am missing something here, so perhaps someone else will chime in. --- Quote End --- I placed the configuration and firmware at a fixed address, and for me, the configuration was a fixed size so I knew the start of the application. I was able to do the copy from within the application and restart the program. I had to use a flag in onchip memory so I wouldn't be in an infinite loop copying after every restart. Copying code to the same place I was running was tricky too but I got it working. --- Quote Start --- I ended up with a Fpga image located at a fixed location and then the software image located at a fixed position someways down. I only need one application image so this works in my application. I agree with you that the standard EPCS bootloader should be available and better yet parameterizable, without having to delve into assembly language. It seems to me that this should be a built in feature of SOPC i.e. I designate a onchip bootrom and then tell it where the FPGA image will start. The tool then creates the bootloader that will automatically find the software image ala epcs flash loader and away we go. From what I can tell the only real differnece is where the FPGA image will begin, other than that the bootloader should be identical. Perhaps, christmas will come early and this feature will be stuck in the next release. --- Quote End --- With the help of my Altera FAE I've gotten a description of what is lacking to someone at Altera who hopefully can make progress on this. We'll see. I agree and mentioned the points you have stated here - it should work for configuration and the application accompanying the configuration. Bill
