Altera_Forum
Honored Contributor
21 years agoQuetions for a multiprocessor system...
Hi (sorry for my "Quetions")
I'm building a multiprocessor system with the requirement that it should contain 2 cpu’s, and communicate in some form trough a dual-port memory (school assignment). I’m using a Stratix Development Kit (1S10) and Quartus II we. 4.2 sp1 with NiosII evaluation kit. My questions are: 1: Can I use the flash device for program memory for both cpu’s? Would this cause collisions or is this managed by the Avalon bus? (I wanted to use on-chip memory but I believe it’s not enough ram-blocks available to support both cpu’s with ROM and RAM + the dualport ram-block) 2: The same as above: Can both cpu’s share the SDRAM block by assigning them to use different address-blocks? 3: How do I address the interrupt-ports on the NIOS II cpu in c-code? (I want cpu_0 to be able to send interrupts to cpu_1…) Any help/comments would be appreciated! Thanks Stian