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Altera_Forum
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9 years ago

Q16.0 QSYS altera_avalon_new_sdram_controller Error Invalid access time t_ac

I have a problem with Q16.0 QSYS SDRAM Controller about : Error: sdram0: Invalid access time t_ac (must be < 3.0 ns). I have searched google about this, there is result not even remotely clo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Problem solved, my bad, the Clock Source meant to be 100Mhz but accidentally be set to 1Ghz.