Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHello,
I tried to assign three clocks for my project. external clock nios clock -- 50Mhz sdram clock --50Mhz audio_xclk-- 12.88Mhz The memory everything worked fine when i compiled the schematic which i get after designing the sopc builder. I just don't know where the issues are. Coming to the reset signal, I did assign a key on the de2 board for the reset signal.