ok, well you will definetly need to figure out how to move some functions to on board ram and some to off chip.
I am going to be in the same boat shortly. I am starting to run out of on chip ram. I did a board spin because of this and put a ram on it just for this purpose. I will be trying to figure it out too.
Have you done an OBJ dump yet? that will give you your memory map.
I still don't know how to modify it though.
I used to work for a company that was using TI DSP C55X and there we had several different levels of memory with different latencies.
We were able to modify a linkmap command file and use pragmas in the C code to tell the linker which section to put each function in.
There must be a way to modify some linker script in the Nios IDE.
Problem is I am the only engineer doing board design, VHDL design and writing all the SW. I'm drowning! hopefully someone can help us with this cause I don't have time to blow trying to figure out something that should be in the Altera documentation. :(