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Altera_Forum's avatar
Altera_Forum
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9 years ago

Problems enabling hps2fpga & lwhps2fpga bridges

the problem:When trying to enable either the hps2fpga or the lwhps2fpga bridge in Linux, the Linux system locks up.

From the rocketboards example:

Command used: "echo 1 > /sys/class/fpga-bridge/hps2fpga/enable"

*or*

Command used: "echo 1 > /sys/class/fpga-bridge/lwhps2fpga/enable"

other useful information:

-The FPGA is configured with a validated .rbf (and indicates in "user mode" per /sys/class/fpga/fpga0/status)

-The fpga2hps bridge can be enabled/disabled normally.

-The issue has appeared after we switched Linux versions and the configurator from Yocto to Buildroot

-If the FPGA is configured with the .rbf and a reboot command issued, the bridges are up once Linux boots and our system functions normally. *unless we try to bring down the hps2fpga/lwhps2fpga bridges

The issue in question has appeared since we switched our Linux environment. There is a high probability that we have missed a configuration setting that would be needed to properly perform this action - any suggestions on this front would be highly welcome.

Not sure if it is helpful or not, the version from /etc/os-release indicates 2015.08-git.

Thank you in advance for any assistance.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    Another day of troubleshooting and the problem has been fixed.

    Once we re-generated the .dtb for the core system, everything started working normally again. I can't say specifically what was wrong with the previous one, but the guess is that our implementer utilized a .dtb packaged with a GHRD and did not generate it from our actual system. I hope this helps anyone with a similar problem.

    -Kosh271
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hi there, I will ask you a couple of questions just to double check and clarify my understanding of your problem:

    Your post lets me to think you are using an example/reference design. If you are, can you specify which example are you using?

    Where you trying this by using a modified FPGA system? eg: where you using a compiled rbf of your own with modifications with respect to the GHRD?

    After you re-generated your dtb, did you have to re-compile any parts of your software? FSBL, kernel?

    Many thanks in advance!
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hi! have you got a solution? Thanks.

    --- Quote Start ---

    Another day of troubleshooting and the problem has been fixed.

    Once we re-generated the .dtb for the core system, everything started working normally again. I can't say specifically what was wrong with the previous one, but the guess is that our implementer utilized a .dtb packaged with a GHRD and did not generate it from our actual system. I hope this helps anyone with a similar problem.

    -Kosh271

    --- Quote End ---